STM32F107VC/Bit-banding - Revision history

Heth at 09:43, 29 January 2012

2012-01-29T09:43:26Z

Heth at 16:01, 27 January 2012

2012-01-27T16:01:55Z

Heth: /* Example */

2012-01-27T14:16:59Z

‎Example

Heth at 14:16, 27 January 2012

2012-01-27T14:16:41Z

Heth: Created page with "=Problem= WHen writing to memory addresses that are shared with multiple processes/tasks - the normal Read-Modify-Write solution can cause problems if another task i scheduled to..."

2012-01-27T13:59:16Z

Created page with "=Problem= WHen writing to memory addresses that are shared with multiple processes/tasks - the normal Read-Modify-Write solution can cause problems if another task i scheduled to..."

New page

=Problem=
WHen writing to memory addresses that are shared with multiple processes/tasks - the normal Read-Modify-Write solution can cause problems if another task i scheduled to run before the Read-Modify-Write cycle is finished and the new task makes its own Read-Modify-Write on the same shared address.

This problem could occur in the configuration Registers of Peripheral - fx. Timers, Interrupt Controllers.
==Example==
The Timer Enable Register (TER) at address 0x4001 is used to enable Timer 1 and Timer 2.
{|border=1 ;style="margin: 0 auto; text-align: center;cellpadding="5" cellspacing="0"
|+ Timer enable Register (TER).
|- bgcolor=lightgrey
! bit 7 !! bit 6 !! bit 5 !! bit 4 !! bit 3 !! bit 2 !! bit 1 !! bit 0
|- align=center
| X || X || X || X || X || 1 = Enable Timer 2<br/> 0 = Disable Timer 2 || 1 = Enable Timer 1<br/> 0 = Disable Timer 1 || X
|-
|}

Timer 1 is used by Task A and Timer 2 is used by Task B.

{|border=1 ;style="margin: 0 auto; text-align: center;cellpadding="5" cellspacing="0"
|+ Example of problem.
|- bgcolor=lightgrey
! Action !! TER at 0x4001
|-
| Task A Reads TER !!
|- align=center
|}

@@ Line 41: / Line 41: @@
 |-
 |}
 [[Category:ARM]][[Category: STM32F107VC]]

← Older revision		Revision as of 16:01, 27 January 2012
Line 1:		Line 1:
		+	{{In progress}}
	=Problem=		=Problem=
	WHen writing to memory addresses that are shared with multiple processes/tasks - the normal Read-Modify-Write solution can cause problems if another task i scheduled to run before the Read-Modify-Write cycle is finished and the new task makes its own Read-Modify-Write on the same shared address.		WHen writing to memory addresses that are shared with multiple processes/tasks - the normal Read-Modify-Write solution can cause problems if another task i scheduled to run before the Read-Modify-Write cycle is finished and the new task makes its own Read-Modify-Write on the same shared address.

@@ Line 21: / Line 21: @@
 ! Step  !! Operation !! Task value !!TER at 0x4001 !! Action
 |-
-| 0 || || || align=center| 0000 0000
+| 0 || || || align=center| 0000 0000 ||
 |-
 | 1 ||Task A Reads TER ||align=center| 0000 0000 ||align=center| 0000 0000 ||
@@ Line 41: / Line 41: @@
 |}
 [[Category:ARM]][[Category: STM32F107VC]]

@@ Line 19: / Line 19: @@
 |+ Example of problem.
 |- bgcolor=lightgrey
-! Action  !! TER at 0x4001
+! Step  !! Operation !! Task value !!TER at 0x4001 !! Action
 |-
-| Task A Reads  TER !!
+| 0 || || || align=center| 0000 0000
-|- align=center
+|-
 |}